(1) Field of the Invention
The present invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of forming planarized shallow trench isolation in the fabrication of integrated circuits.
(2) Description of the Prior Art
Shallow trench isolation (STI) is widely used to provide isolation between active areas, especially in ultra large scale integrated (ULSI) circuit devices. To achieve good planarity after STI, chemical mechanical polishing (CMP) is often used. However, due to pad deformation, the trench open area is susceptible to dishing which causes oxide thinning in the wide trench.
FIG. 1 illustrates a partially completed integrated circuit device of the prior art. A silicon nitride layer 14 has been deposited over the surface of a semiconductor substrate 10. Trenches in the substrate have been filled with an oxide 17. Referring to FIG. 2, the oxide 17 is polished using CMP. Oxide dishing and the resulting lack of oxide uniformity can both be seen in area 19.
A number of workers in the art have sought to avoid these problems. U.S. Pat. No. 4,962,064 to Haskell et al teaches the use of a polysilicon layer over the oxide trench fill material. The oxide material is then planarized with a series of alternating CMP and dry or wet etches including at least two of each. U.S. Pat. No. 5,494,857 to Cooperman et al teaches CMP of shallow trenches using a reverse-tone mask to form oxide blocks in the wide trenches and a silicon nitride polish stop layer. U.S. Pat. No. 5,641,704 to Paoli et al discloses filling trenches with a first conformal oxide, a planarizing oxide, and then a second conformal oxide. The fill material is planarized by chemical etching the active areas through a mask, then CMP, followed by chemical etching with an etch stop at the silicon nitride layer. U.S. Pat. No. 5,492,858 to Bose et al shows a silicon nitride liner deposited in the trench before the oxide filler. The oxide is then steam annealed, followed by a resist etchback step and CMP. U.S. Pat. No. 5,663,107 to Peschke et al uses a doped glass as a fill material with silicon nitride thereover. Planarization includes CMP, isotropic etch back, dry etching to remove the nitride, and a second CMP step.